Branch Instruction

BRANCH INSTRUCTION

---> Read register operands

---> Compare operands
      ◦Use ALU, subtract and check Zero output

---> Calculate target address
     ◦Sign-extend displacement
     ◦Shift left 2 pla-ces (word displacement)
     ◦Add to PC + 4
         -Already calculated by instruction fetch

DATAPATH FOR BRANCH

FIGURE 1

Figure shows the datapath for a branch uses the ALU to evaluate the branch condition and a separate adder to compute the branch target as the sum of the incremented PC and the sign-extended, lower 16 bits of the instruction (the branch displacement), shifted left 2 bits.

BRANCH - ON - EQUAL

FIGURE 2

Figure 2 shows the operation of the branch-on-equal instruction, such as beq $t1, $t2, offset. The four steps execution:

1. An instruction is fetched from the instruction memory, and the PC is incremented

.

2. Two registers, $t1 and $t2, are read from the register file.

3. The ALU performs a subtract on the data values read from the register file. The value of PC+4 is added to the sign-extended, lower 16 bits of the instruction (offset) shifted left by two; the result is the branch target address.

4. The zero result from the ALU is used to decide which adder result to store into the PC

IMPLEMENTING JUMP

• Implement “jump” by concatenating

         – Upper 4-bits of “PC+4”: NextPC[31:28]
         – 26-bit immediate field from instruction
         – Bits 00

{NextPC[31:28], Instruction[25:0], 2’b00}

DATAPATH WITH JUMPS ADDED

PERFORMANCE ISSUE

---> Longest delay determines clock period

           ◦Critical path: load instruction

           ◦Instruction memory

            register file --> ALU --> data memory --> register file

---> Not feasible to vary period for different instructions

---> Violates design principle

           ◦Making the common case fast

---> We will improve performance by pipelining

BY AINI KHAIRANI BT AZMI