THE PROCESSOR 1 : Building A DataPath (INTRODUCTION)

INTRODUCTION TO PROCESSOR

CPU performance factors

◦Instruction count required for a given program

     --->Determined by ISA and compiler

◦CPI and Cycle time

     --->Determined by CPU hardware

We will examine two MIPS implementations

◦A simplified version
◦A more realistic pipelined version

Basic implementation of MIPS instruction set

◦Memory reference: lw, sw
◦Arithmetic/logical: add, sub, and, or, slt
◦Control transfer: beq, j

INSTRUCTION EXECUTION

PC ---> instruction memory, fetch instruction

Register numbers ($t0-$t8, $s0 - $s8, etc) 

   --> register file, read registers

Depending on instruction class

1.Use ALU to calculate

  --> Arithmetic result
  --> Memory address for load/store
  --> Branch target address

2.Access data memory for load/store

3.PC ---> target address or PC + 4

The Processor: Datapath & Control

• Simplified MIPS to contain only 3 classes of instructions:

        1.Memory-reference instructions:

             ---> lw, sw

        2. Arithmetic-logical instructions:

             ---> add, sub, and, or, slt

        3. Control flow instructions:

             ---> beq, j

• Key design principles

     ---> Make the common case fast

     ---> Simplicity favors regularity