Saturday, December 7, 2013

Logic Design Conventions



LOGIC DESIGN CONVENTIONS


Types of logic elements


---> Information encoded in binary


  • Low voltage = 0, High voltage = 1
  • One wire per bit
  • Multi-bit data encoded on multi-wire buses



---> Combinational element


  • Operate on data
  • Output is a function of input
  • Output only depends on the current input
  • Uses for ALU, multiplier, and other datapath



---> State (sequential) elements


  • Store information
  • State element to store the states
  • Output depends on current inputs and current states 




COMBINATIONAL ELEMENTS





SEQUENTIAL ELEMENTS


Register : stores data in a circuit (use D flip flop)

---> Uses a clock signal to determine when to update the stored value

---> Edge-triggered: update when CLK changes from 0 to 1














The logical operation of the positive edge-triggered D flip-flop is summarized in the table below :




To write new data in the register, we use D flip flop with Write Enable

--->Write Enable:
  • 0: Only updates on clock edge where the output of the register becomes the input itself (Data in register will not change.
  • 1: New data is fed to the flip-flop and the register changes its state

CLOCKING METHODOLOGY



Clocking methodology

  •  Defines when signals can be read and when they can be written
  •  Mainstream: An edge triggered methodology
  • Determine when data is valid and stable relative to the clock



Typical execution:

– read contents of some state elements,
– send values through some combinational logic
– write results to one or more state elements







BY AINI KHAIRANI BT AZMI

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