THE PROCESSOR 1 : Building A DataPath (INTRODUCTION)

INTRODUCTION TO PROCESSOR

CPU performance factors

◦Instruction count required for a given program

     --->Determined by ISA and compiler

◦CPI and Cycle time

     --->Determined by CPU hardware

We will examine two MIPS implementations

◦A simplified version
◦A more realistic pipelined version

Basic implementation of MIPS instruction set

◦Memory reference: lw, sw
◦Arithmetic/logical: add, sub, and, or, slt
◦Control transfer: beq, j

INSTRUCTION EXECUTION

PC ---> instruction memory, fetch instruction

Register numbers ($t0-$t8, $s0 - $s8, etc) 

   --> register file, read registers

Depending on instruction class

1.Use ALU to calculate

  --> Arithmetic result
  --> Memory address for load/store
  --> Branch target address

2.Access data memory for load/store

3.PC ---> target address or PC + 4

The Processor: Datapath & Control

• Simplified MIPS to contain only 3 classes of instructions:

        1.Memory-reference instructions:

             ---> lw, sw

        2. Arithmetic-logical instructions:

             ---> add, sub, and, or, slt

        3. Control flow instructions:

             ---> beq, j

• Key design principles

     ---> Make the common case fast

     ---> Simplicity favors regularity

Digital Logic

AND GATES

F=A.B or F=AB

Truth Table :

OR GATES

F = A+B

Truth Table :

NOT GATES

F=A with a bar over the top or F=A’ or F=!A

Truth Table :

NAND GATES

Truth Table :

NOR GATES

 

Truth Table :

XOR GATE

Truth Table :

COMBINATIONAL CIRCUIT

• ·         Can be defined in three ways :

1.      Truth table

 

Examples :

If we have 2 input, therefore 2² =4.  So, there are 4 possible combination.

2.      Graphical Symbols

3.      Boolean equations

-          Boolean function that consist possible combinational of inputs that produce an output signal.

 All Boolean equation can be represented in two forms :

SIMPLIFICATION OF BOOLEAN EQUATION

1. Laws of Boolean Algebra (to simplify  Boolean expression) 
2. Karnaugh Map ( A-grid like representation of a truth table)  

LAWS OF BOOLEAN  ALGEBRA 

 

 

 

Karnaugh Map

Karnaugh Map is known as K-Map . Its provides a simple and straight –forward method of minimizing Boolean expression. The only limitation is that it will be ineffective for more than four (4) inputs.

 

 

K-Map (RULES OF K-MAP)

1. No zeros allowed.
2. No diagonals.
3. Only power of 2 number of cells in each group.
4. Groups should be as large as possible.
5. Every one must be in at least one group.
6. Overlapping allowed.
7. Wrap around allowed.
8. Fewest number of groups possible.

The Karnaugh map uses the following rules for the application of expressions by grouping together adjacent cells containing ones :

 

 



 

UNIVERSAL GATES  

  Universal gates are gates that can be used to implement any gates like AND, OR, and NOT or any combination of basic gates such as NAND and NOR gates.

• NAND GATES (Negated AND or NOT AND)

- NAND gate is a logic gate which produces an output that is false only if all its inputs are true. 

• NOR GATES (Negated OR or NOT OR)
  - NOR gate is a logic gate which produces an output that is true if one of the input is true.
  
  
  
  
  
  
  Prepared by : ANISA LIYANA BINTI ZAKARIA